table_desc_t Struct Reference

TABLE DESCRIPTOR LAYOUT (Lookup levels 0, 1, or 2). More...

#include <page_table.h>

Data Fields
uint64_t	valid: 1
uint64_t	is_table: 1
uint64_t	ignored_7_2: 6
uint64_t	nlta_51_50: 2
uint64_t	access_flag: 1
uint64_t	ignored_11: 1
uint64_t	nlta_47_12: 36
uint64_t	nlta_49_48: 2
uint64_t	res_50: 1
uint64_t	ignored_51: 1

Protected Attributes
uint64_t	ignored_58_53: 6
uint64_t	pxn_table: 1
uint64_t	xn_table: 1
uint64_t	ap_table: 2
uint64_t	ns_table: 1

Detailed Description

TABLE DESCRIPTOR LAYOUT (Lookup levels 0, 1, or 2).

Represents a 64-bit table descriptor as defined by ARMv8/ARMv9 VMSAv8-64 Table D8-50 (4 KB granule). A descriptor at levels 0–2 whose bits [1:0] == 0b11 points to the next-level page table whose base address is encoded in nlta_47_12 (and optionally the DS extension fields). Hierarchical permission fields in bits [63:59] propagate constraints down to every leaf reached through this table.

Field Documentation

access_flag

uint64_t table_desc_t::access_flag

[Bit 10] Access Flag (AF) — set by hardware on first access when FEAT_HAFDBS hardware management is enabled; otherwise IGNORED.

ap_table

uint64_t table_desc_t::ap_table

protected

[Bits 62:61] APTable[1:0] — hierarchical access-permission limit. Overrides AP[2:1] in leaf descriptors reached through this table: 00 = no effect, 01 = no EL0 access, 10 = read-only all, 11 = read-only EL1 only.

ignored_11

uint64_t table_desc_t::ignored_11

[Bit 11] IGNORED by hardware; available for software use.

ignored_51

uint64_t table_desc_t::ignored_51

[Bit 51] IGNORED by hardware; available for software use.

ignored_58_53

uint64_t table_desc_t::ignored_58_53

protected

[Bit 52] Protected Attribute — valid when FEAT_RME PnCH == 1; otherwise IGNORED. [Bits 58:53] IGNORED by hardware; available for software use.

ignored_7_2

uint64_t table_desc_t::ignored_7_2

[Bits 7:2] IGNORED by hardware; available for software use.

is_table

uint64_t table_desc_t::is_table

[Bit 1] Descriptor type — must be 1 to identify this as a table descriptor (levels 0–2). Combined with the valid bit gives bits [1:0] == 0b11.

nlta_47_12

uint64_t table_desc_t::nlta_47_12

[Bits 47:12] Next-Level Table Address — OA[47:12] of the 4 KB-aligned physical address of the subordinate translation table.

nlta_49_48

uint64_t table_desc_t::nlta_49_48

[Bits 49:48] NLTA[49:48] — additional PA bits when TCR_ELx.DS == 1; otherwise RES0.

nlta_51_50

uint64_t table_desc_t::nlta_51_50

[Bits 9:8] NLTA[51:50] — upper bits of the next-level table address when TCR_ELx.DS == 1 (52-bit PA support); otherwise IGNORED.

ns_table

uint64_t table_desc_t::ns_table

protected

[Bit 63] NSTable — output address is in Non-secure PA space when 1 (Secure state only); RES0 in Non-secure state.

pxn_table

uint64_t table_desc_t::pxn_table

protected

[Bit 59] PXNTable — hierarchical Privileged-Execute-Never limit applied to all leaf descriptors reached through this table. RES0 when the stage does not support PXN (e.g. EL2 non-secure stage 1).

res_50

uint64_t table_desc_t::res_50

[Bit 50] RES0 — reserved, must be written as 0.

valid

uint64_t table_desc_t::valid

[Bit 0] Valid descriptor — must be 1; a 0 causes a translation fault.

xn_table

uint64_t table_desc_t::xn_table

protected

[Bit 60] XNTable / UXNTable — hierarchical Execute-Never limit for unprivileged (EL0) execution applied to all leaves below this table.

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The documentation for this struct was generated from the following file:

• src/include/page_table/page_table.h